In a wireless communication system, a transmitter is used for transmitting modulated radio frequency (RF) signals and a receiver is used for receiving an RF signal and processing the received RF signal. A zero intermediate frequency radio device, zero-IF or called “direct conversion”, is commonly used in a radio frequency communication system. A zero-IF receiver utilizes a local oscillator to generate a carrier frequency for down-converting the RF signals into base-band signals. However, the DC-offset often occurs in the radio frequency communication system when the RF signals are directly converted into base-band signals.
Please refer to FIG. 1. U.S. Pat. No. 6,442,380 discloses a zero intermediate frequency radio device, which is used for providing a direct conversion down converter with AC-coupled stages. The down converter 1 includes a low noise amplifier (LNA) 101, a mixer 102 and an AC-coupler 103. The AC-coupler 103 includes a capacitor C and a variable resistor R. A first end of the capacitor C is connected to an output node Vout, and a second end of the capacitor C is connected to the output end of the mixer 102. A first end of the variable resistor R is connected to the output node Vout, and a second end of the variable resistor R is connected to a node 120 for receiving a bias voltage. The AC-coupler 103 further includes an end 112 for receiving a control signal in order to determine the equivalent resistance of the variable resistor R. The low noise amplifier 101 includes an input end connected to an input node Vsig for receiving an AC signal, and an output end connected to the input end of mixer 102. The mixer 102 further includes an end 111 for receiving a local oscillator signal. The capacitor C and the resistor R constitute the AC-coupler 103 used for providing a function of high pass filter.
Please refer to FIG. 2. U.S. Pat. No. 6,784,727 discloses a continuous cut-off frequency switching circuit 2, which is used for fast-settling DC-offset. The circuit 2 includes a first capacitor C1, a second capacitor C2, a first variable resistor R1, a second variable resistor R2 and a continuous variable resistance control circuit 201. A first end of the first capacitor C1 is connected to a first input node Vin1, and a second end of the first capacitor C1 is connected to a first output node Vout1. A first end of the second capacitor C2 is connected to a second input node Vin2, and a second end of the second capacitor C2 is connected to a second output node Vout2. A first end of the first variable resistor R1 is connected to the first output node Vout1, and a second end of the first variable resistor R1 is connected to a common mode voltage source Vcm. A first end of the second variable resistor R2 is connected to the second output node Vout2, and a second end of the second variable resistor R2 is connected to the common mode voltage source Vcm. The continuous variable resistance control circuit 201 connected to the node at the Vcm for controlling the resistance of variable resistors R1 and R2. The input signals of circuit 2 is a differential signal pair, the DC offset within the input signals can be removed by the continuous cut-off frequency switching circuit 2.
In wireless communication, DC offset settling circuit can be treated as a kind of high pass filtering circuit. A DC offset settling circuit is required to provide a controllable variable resistance in a direct conversion receiver for rapidly canceling DC offset.